AI Insights
NVIDIA

CAD Production Engineer, Library Builds

NVIDIA · Santa Clara, California, US
full-timesenior (5-12 yrs)Posted 31d ago
Hardware/Semiconductor EngineeringIC3ICHybrid
StackPythonPerlShell scriptingEDA toolsVLSICAD library buildsBuild operationsVersion controlIssue trackingDashboardsDatabase toolsSilicon design flowsDesign enablementLibrary qualificationLog analysisAutomation scripting

Summary

NVIDIA's Advanced Technology Group seeks a CAD Production Engineer to lead library build and qualification pipeline execution across multiple semiconductor design programs, focusing on build operations, technical triage, release readiness, and continuous improvement automation.

About the role

Join NVIDIA’s Advanced Technology Group—a fast paced team that crafts the next generation of process technologies for AI, HPC, automotive, and graphics. In this role, you will lead execution of the library build and qualification pipeline across multiple projects—tracking status end-to-end, triaging issues, and driving cross-team closure to deliver verified library collateral on schedule. This is not a role focused on writing large EDA flows; it is focused on build operations, technical triage, release readiness, and continuous improvement through targeted automation and better observability.


What you'll be doing:

  • Partner with library, design-enablement, ASIC, and physical design teams to plan, track, and deliver library collateral (views, QA, release notes) across multiple programs

  • Own daily build operations: monitor build health, triage failures, identify blockers/slowness, and drive fixes with the right owners (internal developers, EDA/IT, and design teams)

  • Maintain clear project status (dashboards), run build/release reviews, assign action items, and ensure follow-through to meet milestones

  • Perform technical debug/first-level investigation (logs, regressions, environment changes, tool/version updates) and communicate findings with clear, actionable context. Prevent issues through proactive risk management

  • Drive continuous improvement: metrics (cycle time/failure rate), automation scripts, tool integrations, compute/resource usage improvements—partnering with infra/tool owners as needed


What we need to see:

  • B.S. or M.S. in Electrical or Computer Engineering (or equivalent experience)

  • 5+ years in EDA infrastructure, design enablement, library CAD, or build/release operations for silicon design flows

  • Demonstrated ability to drive multi-team execution: scheduling, risk tracking, communication, and closing action items

  • Comfortable reading build logs and debugging issues across tools/environments; able to do light-to-medium scripting (e.g., Perl/Python/Shell) to automate checks and improve observability

  • Experience with version control and issue tracking; databases/dashboards a plus

  • A passion for improving development flows and VLSI library quality is a must!


At NVIDIA, you’ll have access to internal courses, mentorship programs, tech conferences, and stretch assignments—empowering you to expand your expertise. We value diverse perspectives, relentless curiosity, and one-team determination. Join us, and let’s invent the future together.


#LI-Hybrid 

Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 136,000 USD - 218,500 USD for Level 3, and 168,000 USD - 264,500 USD for Level 4.

You will also be eligible for equity and benefits.

Applications for this job will be accepted at least until April 13, 2026.

This posting is for an existing vacancy. 

NVIDIA uses AI tools in its recruiting processes.

NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.

What you'll do

1Partner with library, design-enablement, ASIC, and physical design teams to plan, track, and deliver library collateral (views, QA, release notes) across multiple programs
2Own daily build operations: monitor build health, triage failures, identify blockers/slowness, and drive fixes with the right owners
3Maintain clear project status dashboards, run build/release reviews, assign action items, and ensure milestone follow-through
4Perform technical debug and first-level investigation across logs, regressions, environment changes, and tool/version updates
5Drive continuous improvement through metrics (cycle time/failure rate), automation scripts, tool integrations, and compute/resource usage improvements

Requirements

5+ years in EDA infrastructure, design enablement, library CAD, or build/release operations for silicon design flows
Ability to drive multi-team execution including scheduling, risk tracking, and cross-team communication
Comfortable reading build logs and debugging tool/environment issues with light-to-medium scripting in Perl, Python, or Shell
B.S. or M.S. in Electrical or Computer Engineering or equivalent industry experience
Experience with version control systems and issue tracking platforms

Nice to have

Databases
Dashboards
Build metrics tooling
Compute/resource optimization

Role overview

Role family
Hardware/Semiconductor Engineering
Level
IC3 — platform
Experience
5–12 years
Type
Individual Contributor
Remote policy
Hybrid
Visa sponsorship
Not offered

Tech stack analysis

LANGUAGES
PythonPerlShell
TOOLS
EDA toolsVersion control systemsIssue tracking toolsBuild dashboards

Green flags

5 items
Salary bands explicitly disclosed for two levels ($136K–$218.5K at L3; $168K–$264.5K at L4), a rare and positive signal of pay transparency.transparency

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Benefits breakdown

HEALTH & WELLNESS
Medical, dental, and vision benefits (implied by standard NVIDIA package)

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Hiring insights

JD quality
9/10
Urgency
high
Autonomy
high
Team size
medium (5-15)

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Red flags

PRO2 items
No explicit mention of bonus structure or 401k match details, which are typically significant at NVIDIA — omission may reflect generic JD template.compensation

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Interview insights

PRO
Rounds
5
Duration
4 wks
Difficulty
hard
Take-home
Yes

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Career path

PRO
Next roles
Staff CAD Production EngineerDesign Enablement ManagerEDA Infrastructure Lead

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About the company

NVIDIA is the world's leading designer of GPUs and AI computing platforms. Its chips power everything from gaming and data centers to autonomous vehicles and scientific research. With a market cap exceeding $2 trillion, NVIDIA's CUDA platform and AI accelerators have become the backbone of the global AI revolution.

HQSanta Clara, CA, USA
Interview difficultyhard
Build vs Maintainboth
Cross-functionalYes