AI Insights
NVIDIA

Design Verification Engineer - PCIE

NVIDIA · Santa Clara, California, US
full-timemid (2-6 yrs)Posted 31d ago
Hardware/Silicon EngineeringIC2ICHybridVisa Sponsored
StackSystemVerilogVerilogUVMVMMPCIeUSBSATAConstrained Random VerificationFunctional CoveragePerlPythonASIC VerificationTestbench DevelopmentBFM DevelopmentSimulation Debugging

Summary

NVIDIA is hiring a Design Verification Engineer to verify next-generation PCI Express controllers for GPUs and SOCs, using UVM and SystemVerilog-based verification methodologies at IP/sub-system levels.

About the role

NVIDIA is seeking an elite Verification Engineer to verify the design and implementation of the next generation of PCI Express controllers for the world’s leading GPUs and SOCs. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. We have crafted a team of outstanding people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing. At NVIDIA, our employees are passionate about parallel and visual computing. We're united in our quest to transform the way graphics are used to solve some of the most complex problems in computer science.

The GPU started out as an engine for simulating human imagination, conjuring up the amazing virtual worlds of video games and Hollywood films. Today, NVIDIA’s GPU simulates human intelligence, running deep learning algorithms and acting as the brain of computers, robots, and self-driving cars that can perceive and understand the world. NVIDIA is increasingly known as “the AI computing company.”

What you’ll be doing:

  • Responsible for verification of the ASIC design, architecture, golden models and micro-architecture of PCIE controllers at IP/sub-system levels using state-of-the-art verification methodologies such as UVM.

  • Build reusable bus functional models, monitors, checkers and scoreboards following coverage driven verification methodology.

  • You are expected to understand the design specification and implementation, define the verification scope, develop test plans, tests, and the verification infrastructure and verify the correctness of the design.

  • You will be collaborating with architects, designers, and pre and post silicon verification teams to accomplish your tasks.

What we need to see:

  • B.Tech./ M.Tech. with 2+ years of relevant experience

  • Experience in verification at Unit/Sub-system/SOC level using Verilog and SystemVerilog

  • Background with verification of IP or interconnect protocols (e.g. PCI Express, USB, SATA)

  • Experience in developing and working in functional coverage based constrained random verification environments

  • Experience in DV methodologies like UVM/VMM and exposure to industry standard verification tools for simulation and debug

Ways to stand out from the crowd:

  • Knowledge of PCIE protocol - Gen3 and above

  • Proficiency in Testbench development using SystemVerilog

  • Perl, Python or similar scripting and SW programming language experience

  • Good debugging and analytical skills

  • Good interpersonal skills & dream to work as a great teammate

With competitive salaries and a generous benefits package, NVIDIA is widely considered to be one of the most desirable employers in the world. We have some of the most brilliant and talented people in the world working for us. If you are creative, autonomous and love a challenge, we want to hear from you. We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status.

#LI-Hybrid

What you'll do

1Verify ASIC design, architecture, golden models, and micro-architecture of PCIE controllers at IP/sub-system levels using UVM
2Build reusable bus functional models (BFMs), monitors, checkers, and scoreboards following coverage-driven verification methodology
3Understand design specifications, define verification scope, develop test plans, tests, and verification infrastructure
4Collaborate with architects, designers, and pre/post silicon verification teams
5Ensure correctness of design implementation through systematic verification processes

Requirements

2+ years of experience in ASIC/IP/sub-system verification using Verilog and SystemVerilog
Hands-on experience verifying IP or interconnect protocols such as PCIe, USB, or SATA
Proficiency in constrained random verification and functional coverage methodologies
Experience with UVM or VMM verification frameworks and industry-standard simulation tools
Ability to own the full verification lifecycle: spec analysis, test planning, testbench development, and debug

Nice to have

PCIe Gen3+
Scripting (Perl/Python)
SystemVerilog Testbench Development
Analytical Debugging
Interpersonal Communication

Role overview

Role family
Hardware/Silicon Engineering
Level
IC2 — qa_testing
Experience
2–6 years
Type
Individual Contributor
Remote policy
Hybrid
Visa sponsorship
Available

Tech stack analysis

LANGUAGES
SystemVerilogVerilogPerlPython
FRAMEWORKS
UVMVMM
TOOLS
Industry-standard simulation tools (e.g., VCS, Questasim, Xcelium implied)Coverage and debug tools (e.g., DVE, Verdi implied)

Salary estimate

$140K – $200K
AI-estimated salary range
Confidence82%
Reasoning

NVIDIA is a top-tier semiconductor company known for premium compensation. For a mid-level DV Engineer with 2+ years in Silicon Valley (Santa Clara, CA), NVIDIA's total compensation packages are well above industry average. Base salary for this level typically ranges $140K–$200K, with additional RSU grants and bonuses that can significantly increase total comp. Estimate is based on NVIDIA's known pay bands, Glassdoor/Levels.fyi data for similar roles, and the Santa Clara location premium.

See the AI-estimated salary range for this role

Sign up free →

Green flags

5 items
NVIDIA is at the forefront of AI, autonomous vehicles, and GPU computing — strong career growth potential across multiple high-impact product linesgrowth

Discover all 5 green flags for this role

Sign up free →

Benefits breakdown

See all benefits organized by category — health, financial, time off & more

Sign up free →

Hiring insights

JD quality
7/10
Urgency
medium
Autonomy
high
Team size
medium (5-15)

See JD quality score, hiring urgency & team details

Sign up free →

Red flags

PRO3 items
Salary range is not disclosed, which is becoming a transparency concern especially for California-based roles subject to pay transparency normscompensation

See all 3 red flags — what the JD isn't telling you

Sign up free →

Interview insights

PRO
Rounds
5
Duration
4 wks
Difficulty
hard
Take-home
No

Get full interview breakdown — rounds, likely topics & prep tips

Sign up free →

Career path

PRO
Next roles
Senior DV EngineerStaff Verification EngineerVerification Lead/Manager

See where this role leads — full career progression

Sign up free →
About the company

NVIDIA is the world's leading designer of GPUs and AI computing platforms. Its chips power everything from gaming and data centers to autonomous vehicles and scientific research. With a market cap exceeding $2 trillion, NVIDIA's CUDA platform and AI accelerators have become the backbone of the global AI revolution.

HQSanta Clara, CA, USA
Interview difficultyhard
Build vs Maintainbuild
Cross-functionalYes