AI Insights
NVIDIA

HSIO Functional and Power Management Engineer

NVIDIA · Santa Clara, California, US
full-timestaff (10-20 yrs)Posted 30d ago
Hardware EngineeringIC4ICHybrid
StackNVLinkNVLink-C2CHSIOPower ManagementPower ModelingBringupDebugSystem ArchitectureHigh-Speed InterfacesTiming AnalysisFirmwareDriver ArchitectureEE FundamentalsComputer ArchitectureProcess VariationsStatistical Error RatesPerf/Power ModelingInterconnect Topologies

Summary

Senior/Staff hardware engineer role at NVIDIA's Silicon Co-Design Group focused on high-speed IO (NVLink, NVLink-C2C) power management, bringup, and debug for next-generation GPU and AI interconnect products.

About the role

NVIDIA Silicon Co-Design Group is seeking a versatile engineer to be part of the HW ArchDev team. The SSG team is uniquely positioned to have an end-to-end view of the product development cycle - from early arch definition, through bringup, to product release.

Our ArchDev arm is a hub for all silicon and system-level feature development, cost-benefit analysis, system integration solutions, and system POR alignment.  As a member of this team, you will dive into next-gen high-speed interconnects like NVLink and NVLink-C2C to make advancements in efficiency and stability. This position offers the opportunity to have a real impact in a dynamic, technology-focused company, impacting product lines ranging from artificial intelligence to consumer graphics to self-driving cars and more.

What you’ll be doing:

  • Contribute to the design of the next generation of high-speed IOs, including NVLink and NVLink-C2C.

  • Responsible for IO power optimizations and continuing to push energy efficiency.

  • Ensure interoperability with connected devices and system components in complex interconnect topologies

  • Deep dive into technically challenging HSIO bugs and help drive debug efforts across various teams

  • Work closely and proactively with other engineering teams such as system architects, mixed signal and design, DGX, software/firmware, HW/SW QA, operations, and AE teams to drive design, development, debug, and release of next-generation products.

What we need to see:

  • BS or MS degree in EE/CE or equivalent experience

  • Minimum 10 years working on HSIO with the following capacity - power management, use case analysis, perf/power modeling, bringup, and/or debug.

  • Ownership and working experience in some of the following areas:

    • Experience with system-level and interconnect power management optimizations

    • Silicon and platform-level power modeling for active/idle use cases

    • Understanding of firmware/driver structures and their interaction with HW.

    • Track record of influence, leadership, and collaboration across multiple teams towards a unified goal.

    • Strong EE fundamentals, knowledgeable in computer architecture, high-speed interfaces, timing analysis, process variations, statistical error rates, and power analysis.

With competitive salaries and a generous benefits package, NVIDIA is widely considered to be one of the technology world’s most desirable employers. We welcome you to join our team with some of the most hard-working people in the world working together to promote rapid growth. Are you passionate about becoming a part of a best-in-class team supporting the latest in GPU and AI technology? If so, we want to hear from you.

#LI-Hybrid

Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 168,000 USD - 264,500 USD for Level 4, and 196,000 USD - 310,500 USD for Level 5.

You will also be eligible for equity and benefits.

Applications for this job will be accepted at least until April 13, 2026.

This posting is for an existing vacancy. 

NVIDIA uses AI tools in its recruiting processes.

NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.

What you'll do

1Contribute to the design of next-generation high-speed IOs including NVLink and NVLink-C2C
2Lead IO power optimizations and drive energy efficiency improvements
3Ensure interoperability with connected devices and system components in complex interconnect topologies
4Deep dive into technically challenging HSIO bugs and drive debug efforts across multiple teams
5Collaborate proactively with system architects, mixed signal and design, DGX, software/firmware, HW/SW QA, operations, and AE teams
6Drive design, development, debug, and release of next-generation products from early arch definition through product release

Requirements

10+ years of HSIO engineering experience spanning power management, use case analysis, perf/power modeling, silicon bringup, and debug
Deep expertise in system-level and interconnect power management optimizations including silicon and platform-level power modeling for active/idle use cases
Strong EE fundamentals with knowledge of computer architecture, high-speed interfaces, timing analysis, process variations, and statistical error rates
Experience understanding firmware/driver structures and their interaction with hardware
Proven track record of cross-functional leadership and collaboration across architecture, design, software, QA, and operations teams

Nice to have

NVLink
NVLink-C2C
GPU Architecture
AI Accelerator Design
Mixed Signal Design
DGX Platform Experience
HW/SW Co-design

Role overview

Role family
Hardware Engineering
Level
IC4 — embedded
Experience
10–20 years
Type
Individual Contributor
Remote policy
Hybrid
Visa sponsorship
Not offered

Tech stack analysis

INFRASTRUCTURE
DGX PlatformNVLinkNVLink-C2C

Green flags

5 items
Salary explicitly disclosed with level-based ranges ($168K–$310.5K), well above industry median for hardware engineers in Silicon Valley.compensation

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Benefits breakdown

HEALTH & WELLNESS
Comprehensive benefits package (specifics not itemized)

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Hiring insights

JD quality
8/10
Urgency
medium
Autonomy
high
Team size
medium (5-15)

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Red flags

PRO3 items
Minimum 10 years of HSIO-specific experience is a very narrow and high bar, potentially limiting candidate pool to a small niche.requirements

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Interview insights

PRO
Rounds
5
Duration
4 wks
Difficulty
very hard
Take-home
No

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Career path

PRO
Next roles
Principal HSIO ArchitectDistinguished Engineer – InterconnectsHardware Engineering Manager

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About the company

NVIDIA is the world's leading designer of GPUs and AI computing platforms. Its chips power everything from gaming and data centers to autonomous vehicles and scientific research. With a market cap exceeding $2 trillion, NVIDIA's CUDA platform and AI accelerators have become the backbone of the global AI revolution.

HQSanta Clara, CA, USA
Interview difficultyvery hard
Build vs Maintainboth
Cross-functionalYes